FET-MX9352-C System on Module SOM IMX93 Forlinx
2.700.000 ₫
Chỉ còn 4 trong kho
Mã sản phẩm: SP25082726
Datasheet: 
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FET-MX9352-C System on Module based on NXP i.MX 93 family i.MX9352 SoC
FET-MX9352-C is an ultra-compact System-on-Module (SoM)/Computer on Module measuring just 33×48 mm. It uses a dual 100-pin board-to-board LGA connector for high integration and reliable mating. The module is powered by NXP’s i.MX9352 application processor from the i.MX93 family, featuring two 1.7 GHz ARM® Cortex-A55 cores and a 250 MHz Cortex-M33 real-time core, plus a 0.5 TOPS Ethos™ U-65 microNPU for cost-effective, lightweight edge AI inference.
Power is managed by an integrated PMIC accepting a single 5V input and generating all required core and I/O rails. The module provides 1 GB LPDDR4 and 8 GB eMMC onboard, and is rated for industrial operation from –40 °C to +85 °C, with a 15-year availability guarantee.
Software Support:
- Pre-built Board Support Packages (BSPs) for Linux kernels 5.15.52 and 6.1.36
Peripheral Interfaces:
- Video & Imaging: 1× 4-lane MIPI-DSI; 1× LVDS (up to 1366×768 @ 60 Hz); 1× RGB888 parallel output; 1× MIPI-CSI-2 camera input (up to 2 lanes, 200 MHz).
- Networking & I/O: Dual Gigabit Ethernet (one port with TSN, IEEE 1588 & 802.1Qbv/bu support); 2× USB 2.0; 3× SD/SDIO 3.0 (4-bit); 2× CAN-FD; up to 8× UART.
- Audio & Expansion: Up to 3× SAI (I²S/AC97/TDM); 1× SPDIF; 1× PDM; up to 8× SPI; 8× I²C; 2× I³C; 4-channel 12-bit ADC; JTAG debug interface.
FET-MX9352-C SoM
Cortex-A55+ Cortex-M33 for Multi Tasks Processing with Low Latency
i.MX9352 is a hybrid processor contains two Cortex-A55@ 1.7GHz cores for multi tasks processing and one Cortex-M33 real-time core;
It integrates upper computer and slave computer in one, but with simplified and compact appearance, which will be beneficial for cost cutting down.
Communication between A core and M core based on built in high speed bus, is more efficient and reliable.
TSN and CAN-FD: Meeting Digitizing Demands for Industries and Automotive
FET-MX9352-C supports two Gigabit Ethernet ports with one enabled with TSN, in addition to ensuring clock accuracy,
it will promote communication between IT and OT, helping to build network with low latency.
0.5 TOPS NPU: Empowering Low Cost and Light AI Applications
i.MX9352 processor contains an innovative ARM Ethos U-65 microNPU, each cycle with 256 MAC,
0.5 TOPS can meet the demand for high efficient, fast and safe machine learning at edge side.
Industrial Grade Materials: Fit for Harsh Environments
All materials including capacitor, resistor and connector on FET-MX9352-C system on module are industrial grade, can support the SoM to work in -40℃~+85℃ operating environment very well.
Various Peripheral Interfaces with High Scalability
Long-Term Availability
i.MX 93 family processors was launched in 2023 and is scheduled with long-term supply, the availability will be at least 15 years.
▊ i.MX 9352 SoM & SBC Video
i.MX 93 Demo | FET-MX9352-C SoM & OK-MX9352-S SBC
▊ Hardware Features
| FET-MX9352-C SoM Features | |
|---|---|
| Processor | NXP i.MX93 i.MX9352
CPU: 2× Cortex-A55@1.7GHz + 1× Cortex-M33@250MHz NPU: 0.5 TOPS |
| RAM | 1GB LPDDR4 |
| ROM | 8GB eMMC |
| Power input | DC 5V |
| Operating temperature width | -40℃ ~ 85℃ |
| Packaging | board to board connector(2x 100-pin connector with pitch of 0.4mm, combined height 1.5mm) |
| Dimensions | 33 x 48mm |
| OS version | Linux5.15.52+Qt6.3.2
Linux6.1.36+Qt6.5.0 |
| Specifications | ||
|---|---|---|
| Interface | QTY | Spec. |
| LVDS | 1 | single 4-lane supports 720p60, and can support up to 1366x768p60 or 1280x800p60 |
| RGB parallel | 1 | RGB888, up to 1366x768p60 or 1280x800p60 |
| MIPI DSI | 1 | 1x 4-lane MIPI-DSI, pixel from LCDIF;
compatible with both MIPI DSI v1.2 and MIPI D-PHY v1.2; up to 200MHz pixel clock, pixel filling rate 140 Mpixel/s, 24-bit RGB; supports resolution 1080p60 or 1920x1200p60, each lane with data rating up to 1.5Gbps |
| Ethernet | ≤2 | supports 2x RGMII, one supported with TSN;
the one with TSN Ethernet QoS supports 802.1Qbv and 802.1Qbu and time based scheduling; 10/ 100 / 1000Mbps, complies with IEEE 802.3 |
| UART | ≤8 | up to 5Mbps |
| CAN-FD | ≤2 | complies with CAN-FD and CAN 2.0B |
| USB | ≤2 | two USB2.0 controllers with PHY integrated |
| SD | ≤2 | uSDHC2: 4-bit, compatible with SD 3.0 and 200MHz SDR, up to 100MB/s
uSDHC3: 4-bit SDIO |
| SDIO | ≤1 | SDIO3.0 |
| SAI | ≤3 | SAI1 supports 2 lanes, SAI2 supports 4 lanes, and SAI3 supports 1 lane;
supports full-duplex serial, such as I2S, AC97, TDM and codec/ DSP |
| SPDIF | 1 | supports raw capture mode
supports L-PCM and IEC61937; |
| PDM | 1 | 24-bit, supports liner phase response and AOP MIC |
| MIPI CSI | 1 | compatible with MIPI CSI-2 v1.3 and MIPI D-PHY v1.2;
supports up to 2 RX data lanes (and 1 RX clock lane); pixel clock up to 200MHz, up to 150Mpixel/s pixel filling rate under rated voltage and super speed voltage |
| SPI | ≤8 | master/ slave mode can be set |
| I2C | ≤8 | up to 100Kbit/s under standard mode, 400Kbit/s under fast speed mode, 1000Kbit/s under enhanced fast speed mode, 3400Kbit/s under high speed mode, and 5000Kbit/s under super fast speed mode;
slave mode is available for high speed mode and super fast speed mode |
| I3C | ≤2 | supports 400Kbit/s fast speed mode and 1000Kbit/s enhanced fast speed mode, it’s backwards compatible with I2C;
clock up to 12.5M, supports HDR-DDR mode |
| ADC | ≤4 | 1x 12-bit 4-lane 1MS/s ADC |
| JTAG | 1 | to debug Cortex-M33 |
▊ i.MX93 Development Board
OK-MX9352-C Development Board
To minimize your development workload, we can provide starter kits that can be used as complete development platforms for evaluation and application development.
OK-MX9352-C development board consists of carrier board and SoM, and SoM could be connected to carrier board via 2x 100-pin connectors, which will be much convenient for plug/ unplug operations with high reliability.
OK-MX9352-C Evk has multiple peripheral interfaces, such as Ethernet, UART, CAN-FD, RS485, etc. Besides, the 4G module and WiFi are well supported even in harsh environments, which could be a reliable reference for users, and finally help users to fasten their product time to market.
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